VSORA and the EIC Accelerator: Europe's AI Inference Chip

VSORA, founded in 2015 by Khaled Maalej and based in Meudon near Paris, designs processors for AI inference, the running of trained AI models, built around a single-die architecture meant to avoid the "memory wall" where compute units sit idle waiting for data. It has two product families: Jotunn for data centres and Tyr for autonomous driving. It was selected in the EIC Accelerator's June 2023 cut-off with blended finance and received an EU grant of €2.50 million for SUPERCHIP, a €3.86 million project from July 2023 to June 2025, according to CORDIS. VSORA announced it would receive "€12.5 million" from the EIC in total, according to VSORA.

The final report says VSORA validated its architecture in simulation, froze its RTL code, completed place and route with "dozens of engineers", designed a package combining several dies and HBM memory, and advanced its compiler, with "final validations are underway before tape-out", according to the CORDIS reporting page. The same report claims "we reached TRL8, completing chip design, packaging, and prototyping". The chip, Jotunn8, taped out on 22 October 2025, four months after the project ended, according to VSORA, and its implementation partner Global Unichip Corp. showed it at TSMC's European symposium in May 2026, according to GlobeNewswire.

Where VSORA Stands Now

VSORA raised $46 million in April 2025 in a round led by Otium and a French family office, with Omnes Capital, Adélie Capital and "co-financing from the European Innovation Council (EIC) Fund", according to VSORA. In January 2026 Sandra Rivera, former chief executive of Altera, became chair of its board, according to VSORA. At tape-out it said development boards, reference designs and servers were "expected in early 2026"; no product launch or customer has been announced since. It reported no revenue and a net loss of €2.67 million in 2025, after a €5.00 million loss in 2024, according to the French ratios dataset.

The Technology: Feeding the Compute

Running AI models at scale is usually done on GPUs designed for training as well. VSORA says its architecture keeps its compute units busy by rethinking how they interact with memory, and in 2023 it claimed more than 50% compute efficiency on large language models against "about 2-4%" for current solutions. These are its own figures.

What the EIC Award Promised, and What the Record Shows

The project aimed to finish the design of a processor for edge and cloud AI. VSORA did the design, packaging and software work within the project, and the chip was sent to manufacture shortly after. But the report's claim of prototyping at TRL8 came before tape-out, and the step that matters commercially, working silicon in customers' systems, has not been shown publicly.

1. Chip design and packagingDeliveredRTL frozen, June 2025.
2. Tape-outDeliveredOctober 2025, after project.
3. Private follow-on fundingDelivered$46M, April 2025.
4. Customers and revenueUnverifiedNone named, €0 in 2025.

The Money

The EU grant covered 65% of the project. The report said VSORA aimed to "finalize our Series B round (€40M)" with the "upcoming EIC equity investment"; the April 2025 round, described by VSORA as €40 million, delivered that. The amount the EIC Fund put in has not been disclosed.

What Cannot Be Checked

Why Europe Should Care

The EU Chips Act aims to build European capacity in advanced semiconductors. VSORA describes itself as "the only European provider" of ultra-high-performance AI inference chips. The EIC helped it through the most expensive design phase. Whether Europe gets a real alternative depends on the chip working and selling.

The Verdict

VSORA and the EIC have not been asked for comment for this article. It is based entirely on public records and published statements, linked throughout.